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Job: Senior Design Verification Engineer (4942097) in Dallas, TX

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Ref. code: N/A | posted on 01/12/2012

Summary

Job Responsibilities and Requirements: Responsible for: - Understanding the expected design functionality, - Developing verification-plans and - Implement verification infrastructure based on cutting edge methodologies and tools. - Verification component development - Methodology support - Operation and maintenance - Pre-and post-silicon verification & debug to achieve verification goals.

Job Type

Full time

Responsibilities

Must be a good team player and have the ability to handle all verification implementation tasks independently in a multi-disciplinary team environment. Must have a good understanding of advanced verification methodologies - Metrics & Plan Driven Verification and have hands-on experience with: UVM.

Required Skills

Verification Planning - Assertion based checks (PSL/SVA) - Team-player: ability to forge and maintain relationships with peer-organizations - Simulation & debug - Gate-level bring up - Scripting: Perl/Ruby/Tcl - Good communications skills Plus: - Experience with Mixed Signal verification.

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75201, Within 50 miles of 75201

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Education and
Experience

- MSEE or MSCE with 8 years of directly related industry experience in ASIC/SoC Verification - Expert knowledge of Object Oriented Programming - System Verilog/SystemC, or Aspect Oriented Programming (e/Specman) - Hands on experience and expert-level knowledge of advanced verification HVL based methodologies (UVM/OVM/eRM) - Expert level knowledge of Coverage Driven Verification - Coverage Model design & implementation using HVLs (System Verilog/SystemC/e).

Additional
Information

For more information of this job please visit us at http://www.hound.com/gjviewjob.php?jid=dfcb73b685558dae205813234e37ba8f94c5120

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